The difference in current consumption is on average 72%. The throughput is on average 44% higher for Implementation Case 2 compared to Implementation Case 1. A common example is the Data General Nova, which was a 16-bit design that performed 16-bit math as a series of four 4-bit. This is, however, at the expense of significantly higher current consumption. Such solutions have a long history in the computer field, with various designs performing math even 1-bit at a time, known as 'serial arithmetic', while most designs by the 1970s processed at least a few bits at a time. It is concluded that implementing the filters using processing elements that can be pipelined to the bit-level results in a higher throughput. The studied properties are throughput and current consumption. The filter realizations are implemented using a 0.18 μm standard cell technology. ![]() In Implementation Case I the digit-serial processing elements are realized using unfolding (Parhi, 1991), which is the most common design method in digit-serial processing, and in Case 2 processing elements that can be pipelined to the hit-level are utilized. ![]() A 6th-order LDI allpass filter has been implemented using digit-serial arithmetics, where two implementation cases are studied. In this paper, the performance of high-speed digit-serial processing elements for recursive systems is studied.
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